AI & Computing

AI data center construction drives structural changes in the memory chip market.

Based on a Forbes report, an in-depth analysis of how AI data center construction drives the explosion of memory chip demand, breaks historical cycles, and reshapes the industry chain, competitive landscape, and regional layout.

Event Overview

Trillion-dollar investments in AI infrastructure are profoundly reshaping the global semiconductor landscape. According to a recent Forbes report, memory chip makers have become direct beneficiaries of AI data centers: Micron's revenue surged 196% year-over-year to approximately $24 billion, SK Hynix posted first-quarter revenue of $35.5 billion—up 198% year-over-year, and Samsung's memory business revenue broke through $50.4 billion for the first time. The market capitalization of all three companies has now exceeded $1 trillion.

This growth spurt is not a traditional cyclical fluctuation but is driven by the sustained demand for high-bandwidth memory (HBM) from AI model training and inference. Micron CEO Sanjay Mehrotra stated that the company can only satisfy 50%–75% of customer demand and is deliberately controlling the pace of new factory ramp-ups to maintain a tight supply-demand balance.

Background: The Memory Industry Breaks the Cycle

Historically, the memory chip industry has been known for its dramatic "boom-bust" cycles: rising demand → price increases → manufacturer expansion → oversupply → price collapses. But AI has changed this pattern. Specialized memories like HBM require complex 3D stacking and advanced packaging technologies, entail long capacity ramp-up cycles and heavy capital investment, and customers (such as NVIDIA and Google) tend to sign multi-year contracts, making prices relatively stable.

Moreover, AI workloads' demand for memory bandwidth is growing exponentially. HBM3E and even HBM4 have become standard for next-generation GPUs. This forces memory makers to transition from commoditized DRAM to customized, high-value-added products.

In-Depth Analysis

Technology Impact: HBM Technology Roadmap and Barriers

The current mainstream solution is HBM3E, offering bandwidth above 1.2 TB/s and connected to the GPU via a silicon interposer. The next-generation HBM4 is expected to enter mass production in 2026, employing more advanced hybrid bonding technology, increasing the number of stacked layers from 12 to 16, and doubling bandwidth. The technological barriers are:

  • Yield control for multi-layer stacking, involving TSV (Through Silicon Via) and microbump processes.
  • Thermal management – high-power GPUs are placed close to memory, making heat dissipation a bottleneck.
  • Interface standards – co-design with GPU vendors (NVIDIA, AMD) creates ecosystem lock-in.

In the future, CXL (Compute Express Link) may partially replace HBM in disaggregated computing scenarios, but in the short term, HBM will still dominate the AI memory market.

Supply Chain Impact: Analysis of Each Link in the Supply Chain

  • Upstream (Equipment & Materials):
  • Core equipment: ASML's EUV lithography machines are used for critical DRAM layers (e.g., storage nodes), and Tokyo Electron's etching equipment is used for HBM stacking.Upstream (Equipment & Materials):
  • Core equipment: ASML's EUV lithography machines used for DRAM critical layers (e.g., storage nodes), Tokyo Electron's etching equipment for HBM stacking.
  • Materials: Demand for silicon wafers (Shin-Etsu, SUMCO), photoresists (JSR, TOK), precursors (Merck) grows with capacity expansion.
  • Beneficiaries: Equipment makers Applied Materials, Lam Research; material supplier Showa Denko, etc.
  • Midstream (Wafer Fabrication & Packaging):
  • DRAM fabs: Samsung, SK Hynix, Micron capacity expansion mainly in South Korea, US, Taiwan. Samsung plans a fab in Taylor, Micron new fabs in Idaho and New York.
  • Advanced packaging: HBM requires TSV + micro bumps + molding processes, mainly carried out internally by memory makers (Samsung, SK Hynix), with some outsourcing to ASE, Amkor.
  • Risk: Overcapacity planning could lead to a repeat of the 2018 oversupply; but AI demand growth far exceeds traditional PC/phones, making short-term risks manageable.
  • Downstream (Data Centers & AI Servers):
  • Server OEMs like Dell, HP purchase HBM modules for integration into AI systems.
  • Cloud providers (AWS, Microsoft, Google) directly procure memory for their own chips (e.g., Trainium, TPU).
  • Micron's largest customer NVIDIA accounts for 16% of its revenue, followed by Apple and Dell.

Competitive Landscape: Evolution of the Triopoly

  • SK Hynix: HBM leader, first to supply HBM3E to NVIDIA, market share ~50%. Clear technology generation advantage, profit expected to double to $33 billion by 2025.
  • Samsung: Full-scale catch-up, leveraging group capital and capacity advantages. Has mass-produced HBM3E and secured AMD orders. Memory business revenue surged, but faces operational risks like union strikes.
  • Micron: The only US player with clear geopolitical advantage. CEO led the divestment of consumer business, fully focusing on AI data centers, while long-term contracts lock in profits.
  • Potential entrants: Chinese players (CXMT, JHICC) constrained by equipment export restrictions, unlikely to enter HBM market in the short term. Japan's Kioxia focuses on NAND, not involved in HBM.

Market share changes: TrendForce data shows 2025 HBM market share at SK Hynix 49%, Samsung 42%, Micron 9%. Expected Micron to rise above 15% by 2027.

Regional Implications: Changes in Regional Industry Chain Positions- United States: Micron expands domestic production, supplemented by subsidies from the CHIPS Act, to strengthen supply chain security. However, advanced packaging capacity is insufficient, and it still relies on Asia. - South Korea: Samsung and SK Hynix dominate global HBM production capacity, but political risks (such as strikes) threaten supply chain stability. The South Korean government is increasing R&D subsidies to consolidate its leading position. - Taiwan, China: Although not a major memory production base, TSMC's advanced packaging CoWoS is deeply integrated with HBM, undertaking part of HBM testing and stacking processes. - Japan: Equipment and material suppliers (Tokyo Electron, Shin-Etsu Chemical) benefit from global expansion, but their own memory production (e.g., Kioxia) is limited in scale. - Europe: Promoting autonomy in automotive and industrial chips, but relying on imports for AI memory; companies like Infineon participate in the supply chain through cooperation. - Southeast Asia: Malaysia and Vietnam undertake back-end packaging and testing, with Intel and AMD setting up HBM packaging lines in the region.

  • Geopolitics: U.S. export controls on China restrict advanced DRAM equipment, hindering technology upgrades for Chinese memory manufacturers, making it difficult for them to become competitive in the short term.Upstream – Materials and Equipment:
  • Silicon wafers: Demand for 300mm polished wafers is growing, and 12-inch fab capacity utilization is at full capacity.
  • Photoresists: ARF immersion photoresists for HBM are predominantly supplied by Japanese manufacturers.
  • Packaging materials: Demand for TSV etching gases, electroplating solutions, and underfill materials increases with the number of stacked layers.
  • Equipment: Orders for ASML’s EUV lithography machines, KLA inspection equipment, and Disco dicing saws remain strong.
  • Midstream – Memory Design and Manufacturing:
  • DRAM design: HBM controllers are integrated into GPU chips, while memory manufacturers handle process development.
  • Manufacturing process: 10nm-class nodes (1z, 1α, 1β) are used; HBM4 will introduce more EUV layers.
  • Capacity distribution: Samsung’s Pyeongtaek, SK Hynix’s Icheon, and Micron’s Boise are the three major hubs.
  • Downstream – System Integration and End Applications:
  • AI servers: Each H100 server carries 80GB of HBM, while the B200 doubles that to 192GB, with even higher capacities expected in the future.
  • Edge AI: Demand for high-bandwidth memory in autonomous driving, robotics, and other fields is gradually emerging.
  • Consumer electronics: Growth in traditional applications such as iPhones and Macs is slowing, but AI PCs are boosting DDR5 penetration.

Conclusion

The construction of AI data centers has fundamentally reshaped the supply-demand structure of the memory chip industry. Through technological monopolies, capacity discipline, and long-term contracts, the three giants have steered the industry away from cyclical fluctuations and onto a sustained growth trajectory. However, this structural dividend depends on sustained high levels of AI capital expenditure and geopolitical stability. For investors, the speed of HBM technology iteration and the pace of capacity expansion will be decisive; for companies in the industrial chain, seizing opportunities in advanced packaging and localization of materials is crucial.

*This article is based on a Forbes report: "The World’s Largest Tech Companies: Memory Chips Skyrocket Amid AI Data Center Buildout" (https://www.forbes.com/sites/rashishrivastava/2026/06/24/the-worlds-largest-tech-companies-memory-chips-skyrocket-amid-ai-data-center-buildout/),结合产业链研究框架分析。不构成投资建议。*

Desk context · semiconreport

semiconreport frames this note through Semicon Report tracks chip design, fabrication, AI compute demand, supply-chain shifts, market cycles, and.... dates, names and status changes still need checking: Source links should be opened before the summary is reused. Chip Industry / Industry brief / Focus explains the local editorial angle.

Source links

  1. https://www.forbes.com/sites/rashishrivastava/2026/06/24/the-worlds-largest-tech-companies-memory-chips-skyrocket-amid-ai-data-center-buildout/Primary

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