Nvidia CPO Roadmap Established: How TSMC COUPE Packaging Drives Next-Generation AI Infrastructure

Introduction

Co-packaged Optics (CPO) is moving from the lab to large-scale commercial deployment, and NVIDIA's latest Scale-Up CPO switch roadmap marks the official entry of this technology into the core deployment sequence of AI infrastructure. According to Digitimes, NVIDIA's plan shows that the per-AI rack bandwidth will jump from the current approximately 130 TB/s to a higher order of magnitude, and the key pillar to achieve this leap is TSMC's Compact Universal Photonic Engine (COUPE) packaging solution.

This move not only signifies a paradigm shift in data center interconnect architecture but will also reshape the entire industry chain from optical modules to switches and AI accelerators. This article will deeply analyze the industrial logic behind NVIDIA's CPO roadmap from perspectives including the industry chain, technology roadmap, competitive landscape, and regional impact.

Background: Why CPO Becomes Inevitable?

The expansion of current AI clusters faces two major bottlenecks: power density and bandwidth density. Traditional pluggable optical modules are approaching the power ceiling at 400G/800G rates, and with the rapid increase in HBM and GPU computing power, the demand for interconnect bandwidth inside and outside the rack continues to grow. NVIDIA's Scale-Up networks (such as NVLink) and Scale-Out networks (such as InfiniBand) both require higher energy efficiency and higher density interconnection solutions. CPO co-packages the optical engine with the switch chip or ASIC, shortening the electrical signal path, reducing power consumption by 30%-50%, while significantly increasing bandwidth density.

NVIDIA's released roadmap indicates that its Scale-Up CPO switch will adopt TSMC's COUPE technology, which is based on a silicon photonics platform, integrating active devices such as lasers, modulators, and detectors with silicon photonic waveguides, and utilizing TSMC's advanced packaging (such as CoWoS or InFO) to achieve efficient coupling with computing chips. This is another key deployment in the silicon photonics field following TSMC's leadership in 3D packaging.

In-depth Analysis

Technology Impact: CPO Technology Pathways and Barriers

• CPO is not a single technology but encompasses multiple aspects including light source integration, silicon photonic chips, and packaging interconnects. Current mainstream solutions include monolithic integration based on silicon photonics and hybrid integration based on thin-film lithium niobate. TSMC's COUPE belongs to the silicon photonics route, and its core advantage is the ability to use CMOS manufacturing processes to reduce cost and improve yield. Technical barriers are concentrated on:
• Light source integration: Efficiently coupling high-performance lasers with silicon photonic waveguides while solving heat dissipation and reliability issues.
• Packaging architecture: How to achieve precise alignment of fiber arrays within limited space while maintaining signal integrity.
• Standardization: Interoperability between different vendors' CPO solutions has not yet been defined; NVIDIA's roadmap may drive industry standard unification.### Supply Chain Impact: Who Benefits and Who Is Disrupted in the Industry Chain?

The promotion of CPO will have a disruptive impact on the existing optical module industry chain.

• Upstream (Materials/Components):
• Silicon photonic chips: TSMC, GlobalFoundries, and Intel’s silicon photonics foundry capabilities will directly benefit. TSMC, with its COUPE technology, is expected to dominate the silicon photonics foundry market.
• Laser chips: Traditional EML (Electro-absorption Modulated Laser) suppliers (e.g., Lumentum, II-VI) need to transition toward integration. Under the CPO trend, demand for discrete lasers may shrink, while demand for VCSELs and silicon photonic integrated lasers increases.
• Fiber arrays: High-precision, high-density fiber connection solutions are required. Japanese manufacturers (e.g., Sumitomo Electric) and emerging companies (e.g., US Conec) will benefit.

• Midstream (Modules/Packaging):
• Traditional optical module manufacturers (e.g., Zhongji Innolight, Coherent, Finisar) face the greatest pressure. CPO moves the optical engine from the module level to the packaging level, potentially causing the pluggable optical module market to gradually shrink after 2026.
• Advanced packaging service providers: OSATs such as ASE and Amkor need to rapidly enhance their silicon photonics packaging capabilities, or they may be squeezed out by wafer foundries like TSMC. TSMC’s COUPE inherently ties packaging and manufacturing closely together, similar to its CoWoS model.

• Downstream (Switches/Systems):
• Switch manufacturers (e.g., Cisco, Broadcom, NVIDIA) need to redesign switch motherboards to accommodate CPO solutions. NVIDIA’s in-house CPO switches will further consolidate its control over the AI hardware ecosystem.
• AI infrastructure operators (Google, Microsoft, Meta): The energy efficiency improvements and bandwidth expansion brought by CPO directly reduce operating costs, especially since optical interconnects in large-scale clusters can account for over 20% of power consumption.

Competitive Landscape: How Will the Competitive Dynamics Evolve?NVIDIA's choice of TSMC's COUPE means that its AI infrastructure interconnect technology will be further tied to TSMC. This will have multiple impacts on other competitive camps: - Broadcom: As a giant in switch chips, Broadcom is also developing its own CPO solution (such as Hummingbird), but its customer base differs. NVIDIA's roadmap may force Broadcom to accelerate cooperation with Intel or GlobalFoundries to avoid falling behind. - Intel: Its silicon photonics program has been laid out for years (e.g., ODI+MXC), but it lags behind TSMC in advanced packaging. NVIDIA's choice means Intel may face limitations in foundry orders for AI interconnect. - Huawei/HiSilicon: Amid the US-China technology decoupling, Huawei is also developing CPO technology, but due to difficulties in accessing advanced process nodes (e.g., sub-7nm), its CPO commercial deployment may be delayed. - Emerging CPO startups: Such as Ayar Labs and Lightmatter, their optical interconnect solutions (e.g., TeraPHY) could offer differentiated alternatives beyond NVIDIA, but face ecosystem compatibility challenges.

Regional Implications: Reshaping of Regional Supply Chains

• Taiwan: TSMC's COUPE technology solidifies its leadership in advanced packaging and silicon photonics. Taiwan's supply chain for optical modules, packaging equipment, and materials (e.g., Yingwei, Hongsu) is expected to benefit.
• United States: NVIDIA's roadmap will further strengthen US control over AI chip design, but the optical module manufacturing segment may partially reshore due to CPO, though advanced packaging still relies on Taiwan.
• China: Mainland optical module vendors (Zhongji Innolight, Eoptolink, etc.) still derive short-term orders from traditional pluggable modules, but face significant pressure from the CPO transition. Meanwhile, Chinese silicon photonics startups (e.g., Sail Technology, Lightelligence) see opportunities, but their mass production capabilities are limited.
• Japan: With advantages in fiber optic connectors, high-precision packaging equipment, and materials, Sumitomo Electric, NTK, and others may capture the high-end interconnect demand brought by CPO.
• Europe: Optical communication equipment vendors (Nokia, Ericsson) have limited influence in the data center market, but silicon photonics projects funded by IPCEI may accelerate local CPO R&D.

Investment Perspective: Focus of the Capital MarketCPO concept has already attracted attention in the secondary market. Investors need to focus on:

• TSMC: COUPE technology will bring additional packaging revenue, but capital expenditure increases need to be monitored.
• Optical module companies: Traditional suppliers such as Zhongji Innolight and Eoptolink face long-term value reassessment, but short-term performance is still supported by 800G/1.6T.
• Silicon photonics foundries: Apart from TSMC, whether GlobalFoundries, Tower Semiconductor, etc., secure CPO orders will serve as valuation catalysts.
• Switch chips: Broadcom and NVIDIA's investment in CPO will impact the competitiveness of their product portfolios.

Long-Term Outlook: Trends over the Next 5-10 Years

• 2026-2028: CPO is mainly applied in Scale-Up networks (e.g., NVLink) within super AI clusters; smaller Scale-Out networks still rely on pluggable modules.
• 2028-2030: CPO penetrates into Scale-Out networks, with single-port speeds reaching 1.6T/3.2T, forming a unified electro-optical co-packaging standard.
• After 2030: CPO may extend to inter-chip connections (e.g., within 2.5D/3D packaging), replacing some electrical interconnections, ultimately achieving all-optical interconnected computing systems.

Industry Chain Analysis

CPO technology involves a complete chain from materials to systems, with varying impacts on each segment:

• Upstream:
• Silicon-based materials: SOI wafer suppliers (Soitec, Shin-Etsu Chemical)
• Optical devices: Laser chips (Lumentum, II-VI)
• Fiber connectors: High-precision FA (US Conec, Sumitomo Electric)

• Midstream:
• Silicon photonic chip manufacturing: TSMC (COUPE), Intel (ODI)
• Advanced packaging: TSMC (CoWoS/InFO), ASE, Amkor
• Optical module assembly: Traditional OSA/OEM vendors (facing transformation)

• Downstream:
• Switches/Servers: NVIDIA, Broadcom, Cisco
• AI data center operators: Google, Microsoft, Meta, AWS

Key Judgments

• TSMC further locks in NVIDIA's advanced packaging orders through COUPE, forming a vertical integration advantage of GPU + CPO.
• A watershed moment is approaching for the optical module industry; companies without silicon photonics packaging capabilities will lose competitiveness within five years.
• China's semiconductor supply chain needs to accelerate domestic substitution in CPO, otherwise it will be forced to follow in the next-generation AI interconnection standards.

ConclusionThe NVIDIA CPO roadmap is not only a technological iteration but also a reshuffling of the semiconductor industry ecosystem. With its COUPE technology, TSMC once again holds the power to define the advanced packaging domain, while the traditional optical module supply chain faces a restructuring. For investors and industrial policymakers, the pace of CPO industrialization will determine the energy efficiency ceiling of AI infrastructure—an impact no less significant than the transition from PCIe 4.0 to PCIe 5.0. Over the next three years, whoever can strike a balance between CPO cost and performance will dominate the AI interconnect market.